Manufacturing and Interconnection of Carbon Nanotube Transistors ,
Phase I
National Science Foundation, SBIR Phase I Project, Start Date: January 1,
2000
The objective of this Small Business Technology Transfer Phase I Project
was to develop a novel integrated process for manufacturing and
interconnecting a 3-D array of transistors made of carbon nanotubes,
suitable for large-scale manufacturing. This large-scale, low-cost
approach will potentially provide extremely fast, low-power,
ultra-high-density logic and memory devices, which operate at room
temperature. The fundamental enabling innovation of the process involves
introducing controlled discontinuities in the structure of the carbon
nanotube. We estimate that our fabrication technology will enable device
densities of 1012 per
cm2, limited only by lateral interconnect
technology. A novel interconnect technology was also be investigated to
provide device densities to 1014 per
cm2.
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